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Spoken Digits in Loihi

Deployment of a spiking neural network for spoken digit classification on Intel Loihi neuromorphic research chip, exploring the trade-offs between accuracy, spike efficiency, and on-chip resource usage.

LoihiNeuromorphicSNN

Loihi Demo / Deployment Video placeholder

Replace with a hardware demo video or chip diagram animation.

Overview

This project takes a trained SNN for spoken digit classification and maps it onto Intel Kapoho Bay Loihi neuromorphic research chip using the NxSDK framework. The focus is on understanding how hardware-specific constraints affect inference accuracy, and what optimisations are needed to maintain performance on-chip.

Deployment Workflow

  1. 1Train SNN offline using surrogate gradient methods.
  2. 2Convert and quantise weights for Loihi's fixed-point arithmetic.
  3. 3Partition network across available neuro-cores respecting fan-in limits.
  4. 4Run inference on-chip and read back spike-based outputs.
  5. 5Profile energy and latency per inference window.

Hardware Constraints

Loihi imposes a maximum fan-in per compartment, fixed-point weight precision, and a specific compartment voltage/current model. This section details how those constraints were handled — including weight clipping, connectivity restructuring, and neuron parameter mapping.

Results

Placeholder for on-chip accuracy, energy per inference, spike count, and comparison with software simulation. Tables and charts to be added soon.